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Ferranti FEI130 Radar Warning Receiver display

Introduction permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1589
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Purchase permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1590
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First look permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1591
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Functional test permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1592
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Connections permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1593
Michel Waleczek found out the connections of the device. The device consists of a couple of modules like a digital board, two deflection boards and a cathode ray tube. Sine the deflection is done by an opamp, a dual rail voltage is to be expected. A filament/heater voltage for the cathode ray tube is also needed and logic chips work normally on 5 VDC. There is no single input power supply board, so it's to be expected that all the different voltages are supplied via the connector at the rear. By measuring the resistance between the power input pins of the logic chips and the conenctor pins it's found out that pin 12 is for the +5 VDC input. Both deflection boards are equipped with opamps and a dual rail voltage is therefore to be expected. Since there are two electrolytic capacitors in series it's to be expected that the midpoint is ground, the positive side of the capacitor is a positive voltage and the negative end is the negative voltage. Michel found out that the ground is connected to pins 13 and 14. +12 VDC is connected to pins 15 and 16 and -12 VDC is connected to pins 17 and 18. And there are two wires of the tube connected to the rear connector which makes it logical that the two wires are for the filament voltage.
pin
function
notes
1
serial data input (positive)Differential data input with pin 2
2
serial data input (negative)Differential data input with pin 2
3
serial clock input (positive)Differential data input with pin 2
4
serial clockinput (negative)Differential data input with pin 2
5
TEST purposeDisplays test screen when pulled low.
Pulled low when TEST button is pushed.
6
not connected or unknown
7
not connected or unknown
8
J1-8(possibly Character Complete)
9
not connected or unknown
10
not connected or unknown
11
not connected or unknown
12
+5 VDC power inputDisplay off: 329 mA/Display on: 361 mA
13
Power supply groundConnected to pin 14
14
Power supply groundConnected to pin 13



15 +12V
16 +12V
17 -12V
18 -12V
19 CRT heater A (6.3Vrms 300mA; 10 Ohms between A and B)
20 CRT heater B
21
22



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videos permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1594
Michel Waleczek did a great job reverse engineering the device! He made a couple of video's about the process of reverse engineering and he made it possible to get the device working. The video's below are a 'must see'. The schematics on this page about the Ferranti FEI30 are also made by him. All credits to Michel!

LDM #41: Ferranti Radar Indicator FEI30 Part 1: Teardown and first tests
LDM #42: Ferranti Radar Indicator FEI30 Part 2: CRT board Reverse Engineering
LDM #43: Ferranti Radar Indicator FEI30 Part 3: yoke amplifiers
LDM #44: Ferranti Radar Indicator FEI30 Part 4: Digital board reverse engineering
LDM #52: Ferranti Radar Indicator FEI30 Part 5: First tests
LDM #53: Ferranti Radar Indicator FEI30 Part 6: Indicator repair
LDM #54: Ferranti Radar Indicator FEI30 Part 7: demo board
LDM #55: Ferranti Radar Indicator FEI30 Part 8: communication interface

Test button permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1595
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Boards permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1596
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High voltgae power supply permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1597
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Deflection boards permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1598
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Logic board permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1599
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Wire coding permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1600
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Data protocol permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1601
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Source: https://www.philpem.me.uk/avionics/ferranti_fe130

basic functional description permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1628
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character location control permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1629
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DAC output signal for X-axis control.

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DAC output signal for Y-axis control.

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DAC X- and Y-axes signals combined.

character generation permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1630
character memory
Phil Pemberton created a great webpage about the FEI30 information. He found out the contents of the character chips and published the table of charachters as shown below. (All credits for the table for Mr. Pemberton.) Each character is build of 8 x 8 'pixels'. The 64 bits per character makes is possible to generate a full character set. The electron beam of the cathode ray tube is controlled in the x- and -y position and by turning the beam on and of it's possible to 'print' dots on the screen. Each character is made of 64 bits. Each row has 8 bits, which is one byte. Thus one character consists of 8 bytes. The left bit of each row is the most significant bit. Here's an example of the letter "A":

00010000 = 0x01
00101000 = 0x28
01000100 = 0x44
01000100 = 0x44
01111100 = 0x7C
01000100 = 0x44
00000000 = 0x00


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beam control
A 'normal' (monochrome) television display 'points' the electron beam at the left top of a cathode ray tube. The beam is deflected from the top left to the top right. The beam is deflected to the left again, but the beam starts a little lower and the beam is deflected to the right again 'drawing' a second line. This process continues until all the lines are 'drawn'. The beam is turned on and off depending on what the picture to be displayed is looking. Also is de beam turned off for each right to left direction. This process as described is simplified, but the point is you get the idea of this 'scanning' type of display.
The Ferranti FEI30 display doesn't work this way. The beam is off in centre position and if a character needs to be drawn, the beam goes to the top left position of a character to be displayed. The beam is deflected to the left 'drawing' the first line. Then the beam 'drops' and 'draws' the second line from left to right. This process repeats until eight lines are 'drawn'. During the 'writing' of these eight lines, the beam is normally 'blanked' so there's nothing 'printed' in the display. By turning the beam shortly on and of, during the 'writing' of the beam a dot is 'printed'. By turning the beam on and of, based on the bits of the character memory, a character is 'printed' on the screen. After 'zigzagging' an turning the beam on and off, the (turned off) beam goes to the start position in the middle of the screen. This process repeats for each character to be printed. The more characters to be displayed, the more time it takes to print all the desired characters. So this display design is much faster dan a scanning display since the beam is only deflected to the positions where the beam is needed instead of scanning the full display each time.

beam control made vidible
I 'hacked' the FEI30 by turning the 'unblanking' signal permanently to low which results in a permanently turned on beam. This makes is possible to follow the behaviour of the beam. On the images below is the result visible. On the top image is the test information displayed, but the 'pixels' are gone since the beam is turned on permanently. The 'default go to position' per character is visible since the beam 'waits' there for a wile at the top left position of the character. It's also visible that the beam 'travels' at high speed back to the centre home position. Remind that this display has no memory! For each data bits sent to the device, the desired character is 'printed' directly at the desired location but the beam goes afterwards directly to the home position waiting for a next character to be printed. So the data has to be repeated as long as the information has to be displayed.

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The beam is turned permanently on to show the path of the beam.

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Here are some 'characters' in detail.


Here's a short video of some test results with the blanking connected to a signal generator. By changing the frequency, the 'interference' frequency is found to make the beam 'writing' more clear.



leading or lagging trace
Michel Waleczek shows in his video that there's a shift register used as a delay to shift the even character lines. The shift register is permanently fed with a 4 MHz pulse so for each of the eight outputs of the shift register, the output is 250 microseconds delayed. At first I didn't understand how the even lines got shifted, but after the 'continuous beam test' I know that the delay is used to correct the beam location. I assumed every character line is 'written' from left to right, but it's in both direction to save half of the time. Tmart thinking. The 'down side' is that an offset can be introduced. The beam delay compensates the offset. The delay is for both directions so the odd and even traces 'meet in the middle'. It's likely there's some delay in turning the beam on and off resulting in an offset if the beam is 'traveling' in the opposite direction. This delay is different per device since my FEI30 is set to output 5 to get a perfect alignment and other FEI30's have another pin position to obtain a perfect view. On the photo below is the shift register shown. The left connection of the jumper wire can be set to the desired solder pad obtaining a perfect alignment between the even and odd character lines. The shift register is located at the bottom right of the digital board.

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If the alignment is wrong, the characters are not that clear to read. On the image below I set the delay to a wrong timing to show the effect of the leading or lagging timing of the odd trace.

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On the image below is the schematic displayed of the delay circuit. The schematic is reverse engineered by Michel Waleczek and I added some notes in green. The shift register is fed with a 4 MHz clock signal which results in (1 / 4.000.000 =) 250 us steps. For each output step, the beam is turned on and off 250 us later.

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Source: Character table: https://www.philpem.me.uk/avionics/ferranti_fe130

schematics permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1631
clock oscillator
The 'master clock' of the FEI30 is based on a 8 MHz crystal. The crystal combined with an 74LS00 NAND gate results in an 8 MHz oscillator. The other four NAND gates are used as buffer amplifiers and most of all as 'switches'. If the [EN], [E4] and [E6] signal are high, the 8 MHz clock signal is fed to the divider. De divider divides the clock signal to 4 MHz, 2 MHz, 1 MHz and 500 kHz. The clock frequencies are used for several parts of the logic board.

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test data generator
The device is equipped with a TEST push button to generate a test signal it's possible to check if the device is working. By pushing the TEST button, the 'main controller' IC114 / PALC22V10 sets the device to the test state. The device needs a set of bits (pulses) to show some information (33 characters) on the display. For each character the character data, x-location and y-location has to be sent to the shift register 'memory'. The circuit for creating the test information is shown below. The circuit is activated by setting the three enable to the desired condition by the 'controller' (when the TEST button is pushed). The 1 MHz clock signal from the main oscillator is used to activate divider 74HC4040 (HEF4040). The output is a binary counter. Output Q1 is not used and the rest of the outputs are used. This results in 2^11 = 2.048 steps. So 2.048 memory addresses can be selected. The output of the binary counter is directly coupled to the test data memory so by each divider pulse, the next higher memory address is selected. If the output of the divider is 00000000000, address 0x0 is selected of the memory. After the first clock pulse, the output of the divider is 00000000001 selecting address 0x1. After the next pulse: 00000000010 > 0x2, 00000000011 > 0x3 and so on to the highest number: 11111111111 > 0x7FF. After the last address, the memory goes to 0x0 again. Each memory location can contain eight bits, but only one bit is used to generate the desired pulse state. The rest of the seven bit locations are empty, so no 'Easter eggs' here. ;-) The output of the PAL 'memory' is a series of bits containing the test character information. The data is sent to the shift register 'memory' for displaying. The contents of the PAL test memory is "FERRANTIRadar WarningReceiver++++". The characters are sent in the order as mentioned. For each character is also the x-location ans y-location sent.

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permalink: http://www.amateurtele.com/index.php?artikel=341&id=#1632

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